搜索资源列表
MX29LV160DTB
- 29LV160或8/16位16Mbit的FLASH防真模型，Verilog语言编写-29LV160 or 8/16 anti-FLASH 16Mbit the true model, Verilog language
ECC_check
- 实现对三星nand Flash的存储信息的错误检测，实现一位纠错，两位检错-ECC check 1bit correct 2bit check Samsung nand Flash
Pulse_Width_Modulator_Altera_MAX_II_CPLD_Design_Ex
- 来自于ALTERA官方网站。 本文档详细介绍怎样利用MAX® II CPLD 来实现脉冲宽度调制(PWM)。本设计还利用了MAX II CPLD 的内部用户闪存振荡器，不需要采用专门的外部时钟。 附有verilog源程序。-From ALTERA website. This document details how to use the MAX ® II CPLD to implement pulse width modulation (PWM). This design
XILINX-FPGA-Startup-Tutorial
- shows how to USE Verilog to program Flash LED1-shows how to USE Verilog to program Flash LED1
k9flash_1024x32_v10
- K9系列FLASH的Verilog控制程序，测试通过-K9 series FLASH Verilog control procedures, test by
flash
- 在nios环境下，结合verilog语言开发，功能是往flash里面写0-99并打印出来-Nios environment, combined with the verilog language development function is to write to flash inside the 0-99 and print out
flash-led
- 利用verilog语言实现fpga硬件下一个简单的流水灯试验,三只灯实现流水操作,一只实现闪烁操作,非常好的入门参考经典实例-Language verilog fpga hardware utilization under a simple light water experiment, three lights to achieve pipelined to achieve a flashing operation, a very good introductory reference to
SPI-NOR-Flash-controller
- 难得的SPI NOR Flash控制器Verilog源代码-A rare SPI NOR Flash controller Verilog source code
SPI-NOR-Flash-controller-Verilog
- SPI NOR Flash控制器Verilog源代码-SPI NOR Flash controller Verilog
GD25LQ40_verilog
- SPI接口的flash仿真模型，用于soc仿真，本人使用过了，很好用的-spi flash verilog model
SPI-flash
- ST公司的M25Pxx SPI flash memory的verilog仿真模型，该模型准确地描述了SPI flash memory的行为，包括读，写，擦除等操作，可以用来挂在带有SPI接口的soc外部，方便验证SPI接口。 -ST' s verilog simulation model M25Pxx SPI flash memory, the model accurately describes the SPI flash memory behavior, including readi
flash
- 用Verilog写的FLASH测试程序。先向FLASH里面写数据，然后再将数据读出来做比较。-Written using Verilog FLASH test program. Xianxiang FLASH write data inside, and then read out the data for comparison.
flash
- fpga Verilog 控制读写flash-fpga Verilog flash
flash
- flash控制器的verilog代码，有点用-flash controller
7_to_1-LVDS-dispaly-from-FLASH
- 该代码是基于verilog 实现的代码，可以用于对接受1080P的LVDS视频数据并处理后显示到各种规格的LCD屏幕上，且支持从FLASH中读取BMP的图片数据并实时显示到LCS屏幕-The code is based on the code verilog achieve, it can be used for receiving LVDS 1080P video and data processing displayed on a variety of LCD screen, and sup
spi_flash_controler
- w25q64 spi flash verilog code .use xilinx ise .
flash_test
- 使用Verilog HDL语言驱动FPGA读写flash(FPGA read and write flash)
12_flash_test
- 对W25Q128的读写操作,spi 0 模式(read and write flash W25Q128)
LCD-104
- serial flash memeory interface with verilog
parallel_norflash_test
- ISE工程，并行nor flash的读、写、擦出，其中有个调用FIFO16-16的IP核，已经在工程中(ISE engineering, parallel nor FLASH read, write, erase, where there is a call FIFO16-16 IP core, has been in the project)